Helpdesk

Top image

Editorial board

Darius Andriukaitis
Kaunas University of Technology, Lithuania

Alexander Argyros
The University of Sydney, Australia

Radu Arsinte
Technical University of Cluj Napoca, Romania

Ivan Baronak
Slovak University of Technology, Slovakia

Khosrow Behbehani
The University of Texas at Arlington, United States

Mohamed El Hachemi Benbouzid
University of Brest, France

Dalibor Biolek
University of Defence, Czech Republic

Klara Capova
University of Zilina, Slovakia

Erik Chromy
UPC Broadband Slovakia, Slovakia

Milan Dado
University of Zilina, Slovakia

Petr Drexler
Brno University of Technology, Czech Republic

Eva Gescheidtova
Brno University of Technology, Czech Republic

Ray-Guang Cheng
National Taiwan University of Science and Technology, Taiwan, Province of China

Gokhan Hakki Ilk
Ankara University, Turkey

Janusz Jezewski
Institute of Medical Technology and Equipment, Poland

Rene Kalus
VSB - Technical University of Ostrava, Czech Republic

Ivan Kasik
Academy of Sciences of the Czech Republic, Czech Republic

Jan Kohout
University of Defence, Czech Republic

Ondrej Krejcar
University of Hradec Kralove, Czech Republic

Miroslaw Luft
Technical University of Radom, Poland

Stanislav Marchevsky
Technical University of Kosice, Slovakia

Byung-Seo Kim
Hongik University, Korea

Valeriy Arkhin
Buryat State University, Russia

Rupak Kharel
University of Huddersfield, United Kingdom

Fayaz Hussain
Ton Duc Thang University, Vietnam

Peppino Fazio
Ca’ Foscari University of Venice, Italy

Fazel Mohammadi
University of New Haven, United States of America

Thang Trung Nguyen
Ton Duc Thang University, Vietnam

Le Anh Vu
Ton Duc Thang University, Vietnam

Miroslav Voznak
VSB - Technical University of Ostrava, Czech Republic

Zbigniew Leonowicz
Wroclaw University of Science and Technology, Poland

Wasiu Oyewole Popoola
The University of Edinburgh, United Kingdom

Yuriy S. Shmaliy
Guanajuato University, Mexico

Lorand Szabo
Technical University of Cluj Napoca, Romania

Tran Trung Duy
Posts and Telecommunications Institute of Technology, Ho Chi Minh City, Vietnam

Xingwang Li
Henan Polytechnic University, China

Huynh Van Van
Ton Duc Thang University, Vietnam

Lubos Rejfek
University of Pardubice, Czech Republic

Neeta Pandey
Delhi Technological University, India

Huynh The Thien
Ho Chi Minh City University of Technology and Education, Vietnam

Mauro Tropea
DIMES Department of University of Calabria, Italy

Gaojian Huang
Henan Polytechnic University, China

Nguyen Quang Sang
Ho Chi Minh City University of Transport, Vietnam

Anh-Tu Le
Ho Chi Minh City University of Transport, Vietnam

Phu Tran Tin
Ton Duc Thang University, Vietnam


Home Search Mail RSS


Cross-Coupled Charge Pump Synthesis Based on Full Transistor-Level

Jan Marek, Jiri Hospodka, Ondrej Subrt

DOI: 10.15598/aeee.v17i3.3061


Abstract

This paper presents utility for the design of the cross-coupled charge pump, which is used for supplying peripherals with low current consumption on the chip, as the EEPROM or FLASH memories. The article summarizes the knowledge in the field of the theoretical and practical analysis of the cross-coupled charge pump (design relationships and their connection with the pump parameters, as the threshold voltage, power supply voltage, clock signal frequency, etc.) that are applicated in the design algorithm. Optimal MOSFETs sizes (W, L) were find based on the construct of the time response characteristics of the pump sub-block and finding of the maximal voltage increase in the active interval of the clock signal and minimizing of the pump losses, as the switch reverse current, inverter cross current, etc. Synthesis process includes the design of the pump functional blocks with dominant real properties, which are described based on BSIM equations for long channel MOSFET. The pump stage complex model is applicated for estimation of the number of pump stages via state-space model description and using of the interpolation polynomial functions in the algorithm. It involves the construction of the time response characteristic due to the state variables and prediction of the number of the pump stages for the next cycle based on the previous data. Optimization of the pump area is based on the minimizing of the main capacitor in each of the pump stages (number of the pump stages must be increased to obtain the desired output voltage value.) Access is designed to stress the maximum pump voltage efficiency. The whole procedure is summarized in the practical example, in which the solution is shown both in terms of maximal voltage efficiency and the optimal pump area on a chip with respect to the clock signal frequency. Added functions of the design environment are explained, inclusive of the designed pump netlist generating for professional design environment Mentor Graphics including the real models of components that are available in library MGC Design Kit. The procedure gives designer credible results without long timeconsuming optimization process. In addition, the complex model allows the inclusion effects of higher-levels.

Keywords


Cross-coupled charge pump; state-space model; synthesis.

Full Text:

PDF