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| Issue | Title | |
| Vol 12, No 5 (2014): December | From UML Specification into FPGA Implementation | Abstract PDF |
| Grzegorz Bazydlo, Marian Adamski, Marek Wegrzyn, Alfredo Rosado Munoz | ||
| Vol 17, No 2 (2019): June | Hardware Implementation Analysis of Min-Sum Decoders | Abstract PDF |
| Rajagopal Anantharaman, Karibasappa Kwadiki, Vasundara Patel Kerehalli Shankar Rao | ||
| Vol 12, No 5 (2014): December | On Ladder Diagrams Compilation and Synthesis to FPGA Implemented Reconfigurable Logic Controller | Abstract PDF |
| Adam Milik | ||
| Vol 12, No 5 (2014): December | Development of Integral Environment in Matlab/Simulink for FPGA | Abstract PDF |
| Dejan Jokic, Slobodan Lubura, Stevan Stankovski | ||
| Vol 12, No 1 (2014): March | FPGA Implementations of Feed Forward Neural Network by using Floating Point Hardware Accelerators | Abstract PDF |
| Gabriele-Maria Lozito, Antonino Laudani, Francesco Riganti Fulginei, Alessandro Salvini | ||
| Vol 19, No 3 (2021): September | Design and Implementation of Parallel Bypass Bin Processing for CABAC Encoder | Abstract PDF |
| Nagaraju Mamidi, Santosh Kumar Gupta, Vijaya Bhadauria | ||
| Vol 16, No 4 (2018): December | A Novel and Fast Hardware Implementation for Golay Code Encoder | Abstract PDF |
| Morteza Nazeri, Abdalhossein Rezai | ||
| Vol 13, No 1 (2015): March | FPGA Implementation of a Simple 3D Graphics Pipeline | Abstract PDF |
| Vladimir Kasik, Ales Kurecka | ||
| Vol 12, No 5 (2014): December | Transition Based Synthesis with Modular Encoding of Petri Nets into FPGAs | Abstract PDF |
| Arkadiusz Bukowiec, Jacek Tkacz, Marian Adamski | ||
| Vol 5, No 1 (2006): March - June | Application of FPGA's in Flexible Analogue Electronic Image Generator Design | Abstract PDF |
| Peter Kulla, Stefan Slavik, Josef Huska | ||
| Vol 13, No 2 (2015): June | Walsh Spectral Techniques for Logic Synthesis FPGA | Abstract PDF |
| Nhan Khanh Huu Nguyen | ||
| Vol 10, No 2 (2012): June | Implementation of Different Variants of Table-Based Frequency Synthesizers with Quadrature Output in VHDL | Abstract PDF |
| Daniel Kekrt, Milos Klima, Radek Podgorny, Jan Zavrtalek | ||
| Vol 3, No 2 (2004): June | Resources of Digital FIR Filters Hardware Implementation in FPGAs for Digital Image Processing in Real Time | Abstract PDF |
| Peter Kulla, Josef Huska, Peter Cvicela | ||
| 1 - 13 of 13 Items | ||
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